Paper Accepted by TCHES 2026, the Premier Conference on Cryptographic Implementation / Kim Young-beom (Ph.D. candidate, Department of Cybersecurity, Graduate School, Class of '23)
- 26.09.14 / 홍유민

A paper co-authored by researchers from leading international institutions—including NXP Semiconductors and France’s Inria/CNRS—with Kim Young-beom, a Ph.D. candidate at Kookmin University’s Cryptography and Security Engineering Research Lab (advisor: Professor Seo SeogChung), serving as the first author, “Low-Stack HAETAE for Memory-Constrained Microcontrollers,” has been accepted for publication in Issue 4, 2026, of IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES), the most prestigious academic journal in the field of cryptographic implementation. This marks another consecutive research achievement, following the publication of the papers “Optimized Implementations of Keccak, Kyber, and Dilithium on the MSP430 Microcontroller” and “Lightweight PQ KEM and Hybrid MQTT Protocol for 8-bit AVR Sensor Nodes” in TCHES 2026, Issue 2.
This research was undertaken to overcome the limitation that HAETAE—a key signature algorithm in the Korea Post-Quantum Cryptography Contest (KpqC)—required very large peak stack memory during the signature generation process, making it difficult to utilize on ultra-lightweight embedded devices with extremely limited resources (8 kB to 16 kB of SRAM). Existing reference implementations required approximately 71 kB to 141 kB of peak stack memory, which significantly exceeded the memory capacity of typical ultra-lightweight microcontrollers, making it difficult to deploy on such devices. To overcome this memory barrier, the research team proposed techniques such as rejection-aware pass decomposition, component-level early rejection, and reverse-order streaming entropy coding using range Asymmetric Numeral Systems (rANS).
As a result, they achieved a reduction in peak stack memory usage of up to 95.8% compared to existing C reference implementations during signature generation and demonstrated that the system operates on actual hardware equipped with 8–16 kB of SRAM. This demonstrates the potential for the practical application of next-generation quantum-resistant digital signature technology even in environments with extremely limited memory, such as ultra-compact IoT devices and sensor nodes.
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Paper Accepted by TCHES 2026, the Premier Conference on Cryptographic Implementation / Kim Young-beom (Ph.D. candidate, Department of Cybersecurity, Graduate School, Class of '23) |
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2026-09-14
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A paper co-authored by researchers from leading international institutions—including NXP Semiconductors and France’s Inria/CNRS—with Kim Young-beom, a Ph.D. candidate at Kookmin University’s Cryptography and Security Engineering Research Lab (advisor: Professor Seo SeogChung), serving as the first author, “Low-Stack HAETAE for Memory-Constrained Microcontrollers,” has been accepted for publication in Issue 4, 2026, of IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES), the most prestigious academic journal in the field of cryptographic implementation. This marks another consecutive research achievement, following the publication of the papers “Optimized Implementations of Keccak, Kyber, and Dilithium on the MSP430 Microcontroller” and “Lightweight PQ KEM and Hybrid MQTT Protocol for 8-bit AVR Sensor Nodes” in TCHES 2026, Issue 2. This research was undertaken to overcome the limitation that HAETAE—a key signature algorithm in the Korea Post-Quantum Cryptography Contest (KpqC)—required very large peak stack memory during the signature generation process, making it difficult to utilize on ultra-lightweight embedded devices with extremely limited resources (8 kB to 16 kB of SRAM). Existing reference implementations required approximately 71 kB to 141 kB of peak stack memory, which significantly exceeded the memory capacity of typical ultra-lightweight microcontrollers, making it difficult to deploy on such devices. To overcome this memory barrier, the research team proposed techniques such as rejection-aware pass decomposition, component-level early rejection, and reverse-order streaming entropy coding using range Asymmetric Numeral Systems (rANS). As a result, they achieved a reduction in peak stack memory usage of up to 95.8% compared to existing C reference implementations during signature generation and demonstrated that the system operates on actual hardware equipped with 8–16 kB of SRAM. This demonstrates the potential for the practical application of next-generation quantum-resistant digital signature technology even in environments with extremely limited memory, such as ultra-compact IoT devices and sensor nodes.
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